Por favor utiliza este link para citar o compartir este documento: http://repositoriodigital.academica.mx/jspui/handle/987654321/76770
Título: A Low-Complexity current-mode WTA circuit based on CMOS Quasi-FG Inverters
Palabras clave: Winner-take-all
neural networks
analog circuits
Fecha de publicación: 9-Jul-2012
Editorial: Computación y Sistemas
Descripción: In this paper, a low-complexity current-mode Winner-Take-All circuit (WTA) of O (n) complexity with logical outputs is presented. The proposed approach employs a Quasi-FG Inverter as the key element for current integration and the computing of the winning cell. The design was implemented in a double-poly, three metal layers, 0.5µm CMOS technology. The circuit exhibits a good accuracy-speed tradeoff when compared to other reported WTA architectures.
Other Identifiers: http://www.scielo.org.mx/scielo.php?script=sci_arttext&pid=S1405-55462011000100004
Aparece en las Colecciones:Computación y Sistemas

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